SDRAngel  4.11.5
Developer docs for <a href="https://github.com/f4exb/sdrangel">SDRangel<\a>, an Open Source Qt5 / OpenGL 3.0+ SDR and signal analyzer frontend to various hardware.
iess.h
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1 // This file is part of LeanSDR Copyright (C) 2016-2018 <pabr@pabr.org>.
2 // See the toplevel README for more information.
3 //
4 // This program is free software: you can redistribute it and/or modify
5 // it under the terms of the GNU General Public License as published by
6 // the Free Software Foundation, either version 3 of the License, or
7 // (at your option) any later version.
8 //
9 // This program is distributed in the hope that it will be useful,
10 // but WITHOUT ANY WARRANTY; without even the implied warranty of
11 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 // GNU General Public License for more details.
13 //
14 // You should have received a copy of the GNU General Public License
15 // along with this program. If not, see <http://www.gnu.org/licenses/>.
16 
17 #ifndef LEANSDR_IESS_H
18 #define LEANSDR_IESS_H
19 
20 #include "leansdr/framework.h"
21 
22 namespace leansdr
23 {
24 
25 // SELF-SYNCHRONIZING DESCRAMBLER
26 // Per ETSI TR 192 figure 8 (except Q20/ not connected to CLOCK).
27 // This implementation operates on packed bits, MSB first.
28 
30 {
32  pipebuf<u8> &_in, // Packed scrambled bits
33  pipebuf<u8> &_out) // Packed bits
34  : runnable(sch, "etr192_dec"),
35  in(_in), out(_out),
36  shiftreg(0), counter(0)
37  {
38  }
39 
40  void run()
41  {
42  int count = min(in.readable(), out.writable());
43  for (u8 *pin = in.rd(), *pend = pin + count, *pout = out.wr();
44  pin < pend; ++pin, ++pout)
45  {
46  u8 byte_in = *pin, byte_out = 0;
47  for (int b = 8; b--; byte_in <<= 1)
48  {
49  // Levels before clock transition
50  int bit_in = (byte_in & 128) ? 1 : 0;
51  int reset_counter = (shiftreg ^ (shiftreg >> 8)) & 1;
52  int counter_overflow = (counter == 31) ? 1 : 0;
53  int taps = (shiftreg >> 2) ^ (shiftreg >> 19);
54  int bit_out = (taps ^ counter_overflow ^ bit_in ^ 1) & 1;
55  // Execute clock transition
56 #if 1 // Descramble
57  shiftreg = (shiftreg << 1) | bit_in;
58 #else // Scramble
59  shiftreg = (shiftreg << 1) | bit_out;
60 #endif
61  counter = reset_counter ? 0 : (counter + 1) & 31;
62  byte_out = (byte_out << 1) | bit_out;
63  }
64  *pout = byte_out;
65  }
66  in.read(count);
67  out.written(count);
68  }
69 
70  private:
73  u32 shiftreg; // 20 bits
74  u8 counter; // 5 bits
75 }; // etr192_descrambler
76 
77 } // namespace leansdr
78 
79 #endif // LEANSDR_IESS_H
unsigned char u8
Definition: framework.h:453
etr192_descrambler(scheduler *sch, pipebuf< u8 > &_in, pipebuf< u8 > &_out)
Definition: iess.h:31
pipereader< u8 > in
Definition: iess.h:71
pipewriter< u8 > out
Definition: iess.h:72
void written(unsigned long n)
Definition: framework.h:308
scheduler * sch
Definition: framework.h:199
void read(unsigned long n)
Definition: framework.h:367
unsigned long u32
Definition: framework.h:455
T min(const T &x, const T &y)
Definition: framework.h:440